Envelope and phase delays correction in an EER radio architecture

International audienceThis article deals with synchronization in the Envelope Elimination and Restoration (EER) type of transmitter architecture. To illustrate the performances of such solution, we choose to apply this architecture to a 64 carriers 16QAM modulated OFDM. We first introduce the problematic of the realisation of a highly linear transmitter.We then present the Envelope Elimination and Restoration solution and draw attention to its major weakness: a high sensitivity to desynchronization between the phase and envelope signal paths. To address this issue, we propose an adaptive synchronization algorithm relying on a feedback loop, a LeastMean Square formulation and involving an interpolation step. It enables the correction of delay mismatches and tracking of possible variations. We demonstrate that the quality of the interpolator has a direct impact on Error Vector Magnitude (EVM) value and output spectrum. Implementation details are provided along with an analysis of the behaviour and performances of the method. We present HPADS and Matlab simulation results and then focus on the enhancement of the transmitter performances using the proposed algorithm

A new reciprocal translocation in a subfertile bull

Three bulls of the Montbéliarde breed that exhibited fertility rates lower than 30% following more than 400 artificial inseminations were examined. Semen quality (sperm motility and morphology) from these bulls was normal. Fertilizing ability estimated from in vitro embryo production results was studied for two of them. In vitro production rate was very low for one bull (A) and normal for the other (B). Cytogenetic analyses were carried out on the three bulls using chromosome banding techniques. These analyses revealed a reciprocal translocation (12;17)(q22;q14) in bull B. Based on family analyses, the hypothesis of a de novo origin of this rearrangement is proposed

Linearity considerations for multi-standard cellular base station transmitters

Contemporary cellular base stations are becoming increasingly multi-standard for improved efficiency and manageability. Primary among prospective multi-standard base station deployments will be those that are reconfigurable but also capable of simultaneous transmission of several cellular signals. The simultaneous transmission of multiple cellular signals however poses a challenge for design, in particular the linearity requirements of the transceiver. In order to identify the feasibility of multi-mode transmission, we present an overview of transmitter non-linearity (OIP3) requirements for future multi-standard, multi-carrier, macro-cell base stations based on first-order approximations, highlighting the dynamic range issue. Simulation and measurement results are also presented

Contribution à l'étude des architectures de radiocommunications à références d'horloges hautes fréquences (application des résonateurs BAW à la génération de fréquence de référence dans les systèmes de communication mobile)

Ces travaux de thèse portent principalement sur la génération de signal d'horloge haute fréquence. Dans un premier temps, la faisabilité d'un oscillateur à base de BAW y est démontrée par la conception d'un circuit en technologie CMOS 65 nm. Les deux principales innovations sont les performances en terme de stabilité (bruit de phase de -128dBc/Hz à 100kHz de la porteuse) et en précision (implémentation d'une banque de capacités ayant un pas de 0.4ppm) de l'oscillateur. Sa consommation est optimisée (0.9mW). Il est suivi d'un diviseur faible bruit (-140dBc/Hz à 100kHz de la porteuse) délivrant un signal à 500MHz. Dans un second temps, les imperfections des résonateurs BAW sont analysées. Une procédure de calibration comprenant une calibration initiale et une calibration en boucle ouverte est alors proposée. Cette dernière repose sur l'identification et l'utilisation d'un modèle comportemental du dispositif, régulièrement mis à jour grâce à un filtre de Kalman. Une précision de 0.4 ppm est atteinteThis thesis deals with the gigahertz range reference frequency generation. In a first part, this document presents the design of a 500 MHz oscillator in a 65 nm CMOS process using a 2 GHz Bulk Acoustic Wave resonator. A digital frequency control is implemented using a switched capacitor bank in parallel to the resonator. The tuning range is up to 500 kHz with a minimum step of 200 Hz. The oscillator core uses a differential topology and is designed for low phase noise (-128 dBc/Hz at 100 kHz offset) at low power consumption (0.9 mW). It is followed by a low noise divider which provides a 500 MHz output with a phase noise of -139 dBc/Hz at 100 kHz offset from the carrier. In a second part, we consider a method for the calibration of a BAW based frequency reference. In fact, the frequency variations of a BAW oscillator against process, supply, temperature and aging effects make difficult its use as a frequency reference. We propose here a method based on Kalman filtering to identify with high precision a behavioral model of this BAW reference, thus enabling its use in an open loop frequency tuning. A precision of 0.4 ppm is achievedPARIS-EST-Université (770839901) / SudocSudocFranceF

Linearity considerations for multi-standard cellular base station transmitters

Contemporary cellular base stations are becoming increasingly multi-standard for improved efficiency and manageability. Primary among prospective multi-standard base station deployments will be those that are reconfigurable but also capable of simultaneous transmission of several cellular signals. The simultaneous transmission of multiple cellular signals however poses a challenge for design, in particular the linearity requirements of the transceiver. In order to identify the feasibility of multi-mode transmission, we present an overview of transmitter non-linearity (OIP3) requirements for future multi-standard, multi-carrier, macro-cell base stations based on first-order approximations, highlighting the dynamic range issue. Simulation and measurement results are also presented

Étude des architectures EER pour les émetteurs de radio-communications numériques 3G et au-delà

PARIS-EST Marne-la-Vallee-BU (774682101) / SudocSudocFranceF

Analyse et conception d'une architecture numérique innovante d'émetteur universel pour radiocommunication numérique

Avec la multiplication des normes à enveloppe variable, il est nécessaire de s adapter au marché en proposant des architectures d émetteur multistandard et peu consommatrice. En effet, les nouvelles normes ont pour but de transmettre plus d informations avec un débit plus élevé mais la durée d utilisation des batteries n a comparativement pas ou peu augmenté. Cette thèse propose d étudier une nouvelle architecture basée sur le principe d élimination et restauration d enveloppe afin d obtenir un signal à enveloppe constante. Celle-ci est liée à l utilisation d un modulateur sigma-delta qui code l enveloppe. Le signal ainsi modifié permet d employer un amplificateur de puissance à haut rendement. Après avoir simulé l ensemble de la chaîne d émission, nous nous sommes focalisés sur le sigma-delta, qui doit fonctionner à haute fréquence. Nous détaillons son fonctionnement et le choix des éléments le constituant. Nous avons conçu et réalisé ce sigma-delta numérique en technologie CMOS 0.13um. Le circuit a été testé jusqu à 1.5GHz et comporte une consommation faible (15mW)With developing new standards with variable envelope, it is necessary to propose low power multistandard transmitter architectures. Indeed, the goal of new standards is to transmit more information with high data rate but the battery life has not grown in the same way. This thesis propose the study of a new envelope elimination and restoration architecture in order to transmit a constant envelope signal. This architecture is linked to the use of a sigma-delta modulator which code the envelope. This modified signal allow the use of a highly efficient power amplifier. After having simulated all the transmitter chain, we emphasize on the sigmadelta, that has to be clocked at high frequency. We detailed its operation and the choice of its elements. We designed and fabricated this digital sigma-delta in 0.13um CMOS technology. The circuit was tested until 1.5GHz and consumes less than 15mWPARIS-EST Marne-la-Vallee-BU (774682101) / SudocSudocFranceF

Analytical methods for the evaluation of the impact of the VCO phase noise and the modulator/demodulator IQ imbalance for a QAM modulation

International audienc

Gain and Delay Mismatches Cancellation in LINC and Polar Transmitters

International audienceThis article presents the application of a gradient algorithm on impairments correction for polar and LINC transmitters (LInear amplification with Non linear Component). The two aspects of the approach are presented: identification and correction. The large improvements obtained using such solutions are demonstrated for both transmitters